LDO is a linear regulator, which uses transistors or field effect transistors (FET) operating in its saturation region to subtract the excess voltage from the applied input voltage to generate a regulated output voltage. The so-called voltage drop refers to the minimum difference between the input voltage and the output voltage required by the regulator to maintain the output voltage within 100mV above and below its rated value. LDO regulators with positive output voltage usually use power transistors (also known as pass devices) as PNP. This transistor allows saturation, so the regulator can have a very low voltage drop, usually about 200mV; In contrast, the voltage drop of the traditional linear regulator using NPN composite power transistor is about 2V. Negative output LDO uses NPN as its transfer device, and its operation mode is similar to PNP device of positive output LDO.