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RS-485 bus, this article is very detailed

release time:2022-03-17Author source:SlkorBrowse:1060

All Men Are Mortal

RS-485, what does RS mean? Recommended Standard is the abbreviation of recommended standard, which means recommended standard. 45 is the standard identification number. As for why this identification number is chosen, there is no need to go into details. RS-485 is also known as ANSI/TIA/EIA-485. These prefixes are abbreviations of standards associations. For example, EIA is the abbreviation of Electronics Industries Association EIA. In 1983, RS-485 communication interface was approved as a communication interface standard by Electronics Industries Association EIA.
Even today, when IOT is hot, RS-485 still has a large number of applications. Many protocols use RS-485 as the physical layer. For example, what are the common standard protocols that use RS-485 as the physical layer? For example:

  • 工业HART总线
  • modbus协议
  • Profibus DP
  • .......


Signal is sampled for differential mode transmission. Differential mode is relative to common mode, and differential mode is also called differential mode. So what kind of transmission is differential mode? A picture is worth a thousand words, just look at the following two pictures:

采When the common-mode transmission mode is used, the common-mode noise will be superimposed on the final output signal, polluting the original signal.

With differential mode transmission, the signal+and signal-phase from the source end are opposite, while the common-mode noise will exist on both+/-lines. Ideally, it will have the same amplitude and phase, while the receiver end is equivalent to a subtractor, and the useful signal will remain after the subtractor because of the opposite phase, while the noise will be cancelled. In the actual circuit, it will be greatly weakened.
Therefore, the advantage of differential mode transmission over common mode transmission is that differential mode transmission can effectively cancel common mode interference.
In some places, differential mode is also called balanced mode, while common mode is also called unbalanced mode.

For this interference, let's actually grab a waveform and have a look:
At the edge of the A/B signal, the waveform is slightly distorted, but you can see that the A-B is poor (the red one is the MATH subtraction function of the oscilloscope, and the edge is very clean! This example shows that differential mode transmission can effectively resist common mode interference.

Electrical parameters

The electrical parameters of RS-485 are:

  • The common-mode voltage range is-7 ~+12V.
  • It can support 32 multipoint topology connections, as shown in the following network topology diagram.
  • When a 40-foot cable is used, the transmission rate can reach 10Mbps, and 1 foot is equivalent to 30.48cm, where Mbps means megabit/s.
  • With a 4000-foot cable, the transmission rate can reach 100kbps.
  • Half duplex communication
  • Minimum differential voltage tolerance: 200mV, which means that the receiver can't correctly identify 0/1 when the differential voltage is lower than 200mV. How should you understand this sentence?

How to understand the above picture? The transmitting circuit of RS-485 transceiver provides at least 1.5V differential voltage output capability, and the amplitude of the differential signal must gradually attenuate through the bus line impedance attenuation, 32 receiving circuit input impedances, and 120 termination resistors, so at least 200mV differential voltage needs to be provided to the terminal receiving circuit at the end.

For the receiving circuit, the difference between the common-mode voltage of line A and the common-mode voltage of line B is determined:
  • 如果 ,The receiving circuit r recognizes logic 1.
  • 如果 ,The receiving circuit r recognizes logic 0.
Simply put, the absolute voltage value of line A is at least greater than 200mV of line B, and it is recognized as logic 1, or the absolute voltage value of line A is at least 200mV less than that of line B, and then it is recognized as logic 0.

The parameters here should be the theoretical values of cables with a certain characteristic impedance, which need to be adjusted and tested on the spot in practical engineering. Generally, it is better not to exceed this theoretical limit.
When it comes to electrical characteristic parameters, let's first look at the general interface circuit:
From such an interface circuit, there are some key points:

  • RS-485 communication is based on UART interface and RS-485 transceiver interface from the interface of MCU /DSP/ processor. Of course, can't you say I use FPGA? It's definitely possible, and it's certainly possible to implement an IP module for serial port transceiver with FPGA. You even want to say, can't I use GPIO to simulate UART? It can also be done, but it doesn't make much sense to do so. It takes up CPU resources to realize the sending and receiving of the underlying BIT.
  • When it comes to half-duplex, half-duplex means full-duplex. What is half duplex? First of all, half-duplex and full-duplex, defined objects must be point-to-point, herePoint-to-point means at the same time.Half-duplex means that the equipment is either in the data receiving state or in the data sending state at the same time, and it is not allowed to send and receive data at the same time. 
    Full duplex is just the opposite, allowing simultaneous transmission and reception. For example, I2C bus is half-duplex bus, 4-wire SPI is full-duplex, and 3-wire SPI is half-duplex. For example, RS-422 or RS-232 is a full-duplex interface; While CAN bus is a half-duplex bus. RS-485 is a half-duplex bus:

  • When the Host sends data, the data is transmitted to the Slave's differential receiving circuit through twisted pairs along the red line. When the slave answers, the data is transmitted to the Host's receiving circuit along the blue direction. However, the transmission medium is a pair of twisted pairs, so when one party transmits data, the other party cannot transmit signals. From the control point of view of the transceiver:
    On the control chip side, a GPIO pin is used to control the transceiving enable, and it's easy to understand with a block diagram of the internal principle of the chip:

  • When DIR=0, the receiving circuit is enabled.,Circuit disable DE=0, which is equivalent to high resistance for bus; When DIR=1, the receiving circuit is enabled. ,The circuit disable DE=1, and the A/B signal to the bus depends on the signal of DI. There are two problems here:
    1.Why did the chip putDesigned as the opposite effective logic? In fact, it is also convenient to use one GPIO to control the transceiver circuit simultaneously.
    2.Why isn't the transceiver chip transceiver enabled as a foot? Like DIR? Two-legged hair collection/hair can also be controlled separately with two feet, such as
  • Even when DE=1, theSet it to 0, so that it can self-loop? The product can also be designed in this way, which can realize self-diagnosis of transceiver and wiring. By comparing the received message with the sent message, we can diagnose whether the chip is soldered, whether the transceiver is damaged or open, and whether the wiring has short circuit fault.
    You might say, Nonsense! You said earlier that RS-485 can't send and receive at the same time, but here you say it can send and receive at the same time. Isn't it contradictory? No, the aforementioned inability to send and receive at the same time means that you can't receive sending messages from other devices at the same time. Here, you receive messages sent by yourself.
    Therefore, the essence of half-duplex is that there is no two-way channel in the communication medium. When sending data to the bus, the medium is occupied, and even if you want to send it, you can't send the signal to the medium correctly. If you send it forcibly, the data will be disordered, and even the transceiver chip may be damaged.
    • : Receiver Output Enable,Receiver enable,
    • DE:Driver Output Enable,Drive output enable
  • The DIR foot in the figure is to control whether the current RS-485 is in "receive" or "send" mode.

Speaking of the common-mode voltage index and differential-mode transmission mode, here's a look at the actual waveform:
CH2 of the oscilloscope is connected to the 485 output A terminal, CH3 is connected to the 485 output A terminal, and the red one is the MATH function of the oscilloscope: CH2-CH3. Most oscilloscopes have mathematical operation function.

If you want to see the differential signal, you can use the dual-channel oscilloscope plus MATH subtraction function to observe. Maybe some oscilloscopes don't have MATH function, so here's another trick to use:
Invert the negative terminal of the B channel, or differential signal, and then move the B channel up to the idle level to coincide, so that you can see A-B intuitively?
What valuable signal features can be found from this graph?

  • 信A is at high level when idle; B signal is at low level when idle. So you will see that 485_A+, 485_B- will be marked on some devices.
  • The common-mode voltage of each channel is within-7 ~ 12V as required by the standard, and the signal A is 4V and the signal B is 5V:

So how to interpret the data?
The captured data here is a message sent by MODBUS-RTU master to slave devices, the first two bytes of which are 0x01 0x03, and the UART mode is a start bit, eight data bits, a stop bit, no check bits, and the lower bits are in the first place. in this caseCommunication format of UART is
First, according to UART communication mode, calculate several parameters, the occupied time per bit and the occupied time per byte:

This figure is the starting bit, and the width is exactly 104us.
For analyzing this asynchronous serial timing waveform, the most important thing is to calculate the bit time and byte time according to the communication format, and then directly analyze the waveform data. From this point of view, it is assumed that a UART protocol logic analyzer should be implemented by FPGA, which is the core index. By detecting the edge of the start bit, the data can be analyzed through the time axis. Here, let me act as a naked eye UART logic analyzer:
The time width of 8-bit data is just 832us. As the format is low bit first, we should look at it the other way around, which is consistent with the actually sent data 0x01 0x03.
Here, if you encounter problems when debugging the bottom layer, you can check whether the software drives the hardware correctly. For example, when debugging I2C/SPI and other bottom interfaces, you can similarly check the hardware waveform. The only difference is that I2C/SPI belongs to synchronous communication. The so-called synchronous communication means that there are synchronous clock signals in the bottom layer of communication, and the SCL of I2C and SCK of SPI belong to synchronous clock.

Driving ability

It is concluded in the electrical parameters that the maximum electrical driving capacity of RS-485 isUnder the multipoint network topology, it can drive up to 32 sites. So how to interpret this indicator?First of all, let's examine the characteristics of the transceiver circuit of a site. The standard equivalent input impedance of the transceiver circuit is 12kΩ. For example, the MAX 485 data sheet is taken as an example:Why is it 32? Mainly due to the previous requirement of minimum driving capacity of 200mV.It can also be understood that the input impedance of each receiving circuit is not ideal high impedance, but 12kΩ. So, for example, if one of the stations transmits, it is equivalent to the input impedance of 32 stations connected in parallel. Why are there 32 stations? Don't forget that the sending station itself has a receiving circuit, so without considering the termination resistance and line impedance, an equivalent load: is connected to the sending circuit, and the driving ability of the sending circuit is definitely limited, so it is easy to understand.The following figure is the so-called multipoint network topology. All stations are arranged along twisted pairs and connected to the bus.Therefore, you may see the so-called one unit RS-485 load in some places. The so-called unit load here refers to the 12kΩΩ standard input impedance, which is defined by EIA-485 standard. Thus, we can see that the statement such as unit load comes from here.


For example, in a Modbus-RTU multipoint network based on RS-485, it may be necessary to monitor all the messages on the bus when programming the protocol or debugging the actual multi-site bus. It is even possible to record all the messages on the bus just like a recorder that implements a bus message. How should it be achieved?Buy a USB-to-RS-485 conversion cable or make one yourself. Connect the A/B cable in parallel to the bus and plug the USB into the computer. You can monitor all the messages on the bus by using the serial port monitoring terminal or writing a serial port receiving software yourself.For example, this AccessPort serial port tool is easy to use:


As an application design, these dimensions need to be considered:

Termination design

interface chip

Isolation design


Why should it be terminated in the first place? This is because RS-485 adopts twisted-pair transmission, and the differential characteristic impedance of twisted-pair is between 100Ω and 150Ω. RS-485 standard makers choose 120ω as the nominal characteristic impedance.
Assume that the signal is sent from the station on the left. If it is not terminated, the impedance of the signal is continuous when it is transmitted on the line, but when it reaches the right, the equivalent impedance becomes the input impedance of the receiving circuit, for example, 12kΩ, the impedance is discontinuous, and the impedance suddenly changes! Part of the energy of the signal will return according to the original path. For example, due to capacitive reactance and inductive reactance, the returned signal will have a phase difference. The reflected signal is superimposed with the original signal. This will cause communication errors, and in serious cases, communication will not be carried out correctly.
If you want to know more about the principle behind it, you can study the transmission line theory.Perhaps friends who have done Profibus DP (RS-485 is also used in the physical layer) will say, why do you think the terminal matching circuit recommended by profibus DP is as follows?Actually, it is because the nominal characteristic impedance of communication media adopted by Profibus DP is different. Therefore, there will be small differences in practical engineering applications.

See such a termination method in TI's data:

In the case of serious noise, it is suggested to use the right termination scheme, which uses two 60Ω resistors and 220pF capacitors to form a low-pass filter, which will increase the anti-noise capability of the line.

In the actual engineering wiring, if there is serious noise, on the one hand, you can check the bus signal quality with oscilloscope, and make some minor adjustments in the termination mode.


RS-485 transceiver chips are provided by many chip companies, such as TI,Microchip and other manufacturers. When choosing an interface chip, it is necessary to consider whether the input logic of the power supply voltage of the chip is compatible with the level of the single-chip microcomputer /DSP used, and whether the impedance of its receiving circuit meets the input impedance of RS-485 standard. If not, then when considering the network deployment, the amount of load that can be carried may need to be adjusted. In addition, please note that some newly designed RS-485 transceivers have fail-safe function.
In addition, the aforementioned standard transceiver can drive 32 standard transceiver load devices, that is, (12kΩ) standard unit input impedance.

EMC requirements should also be considered when designing specific interface circuits. There is really strong interference in some equipment sites. For example, there are inductive devices such as large motors running on the power grid, which sometimes interfere with the equipment; In addition, there may be space radiation interference. At this time, we can consider using twisted-pair cable with shielding, and the shielding layer is connected to the earth. I don't know much about anti-interference, so I'll just sort it out. Here is a design scheme of lightning protection interface circuit, for reference:

It is said that the standard RS-485 can accommodate 32 standard receiving impedance transceiver devices. Actually, the system just wants to access more than 32 site devices. What should I do? A relay device can be designed. I want to connect the two network segments by relay to solve the problem of insufficient driving ability. Of course, there are such ready-made products.


Why isolation? It is to reduce the grounding noise. In many sites, there may be high-current switchgear, motor inductive equipment, etc., and noise may be coupled into the equipment through communication grounding. Especially in industrial equipment, interface circuits with isolation are generally designed. To design an isolation interface, you can consider choosing a chip with isolation function, such as ADM2481 and ADM2485, the iCoupler technology products of ADI. Of course, optical coupler+common RS-485 transceiver can also be used. The only thing to note is that a power supply with isolation is needed to supply power to the circuits on both sides of the isolation.

The above picture is from TI's "The RS-485 Design Guide". This information feels very good, and many places in this article are also compiled with reference to this document. If you are interested in this information, you can reply to 485 in the background to collect it automatically.


RS-485 seems simple, but there are still many things to understand and pay attention to when it is actually applied to design. To be a stable product, the difference is often not the general direction, but some subtle points that easily lead to the instability of the product.

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